**Role Number:** 200634644-3401

**Summary**
In this position, you will work with the team that develops SoCs. In this high-impact role, you will define and own the end-to-end signal and power integrity strategy for cutting-edge high speed SerDes. You will be responsible for ensuring robust interconnect performance from silicon to system. This position requires deep expertise in leading-edge SerDes technologies (224G+), modern interconnect protocols, and system-level co-design.

**Description**
As the SIPI Architect, you will define and own the end-to-end signal and power integrity architecture for high-speed SerDes interconnects. You will guide technical direction across various teams, lead system-level trade-off analyses, and ensure design robustness through advanced modeling and validation.

**Minimum Qualifications**

+ BS and 10 +years of relevant industry experience.

**Preferred Qualifications**

+ MS or PhD in Electrical En...