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Senior/Manager Physical Design

Company

Helius

Location

singapore, sg, Singapore

Type

Full-time

Responsibilities:

  • Perform Netlist-to-GDS design flow, encompassing floorplanning, placement, timing optimization, clock free synthesis, and routing.
  • Support STA (Static Timing Analysis) timing analysis and troubleshoot timing-related issues.
  • Collaborate with cross-functional teams to ensure successful implementation of design projects.
  • Contribute to the development and enhancement of design methodologies and flow optimizations.
  • Stay updated with the latest industry trends and advancements in IC design.
  • Requirements:

  • Bachelor's degree in Electrical Engineering (EE) or Computer Science (CS)
  • Proficiency in using Cadence Innovus or Synopsys ICC2/Fusion Compiler for IC design tasks.
  • Strong understanding of the Netlist-to-GDS design flow and its various stages.
  • Familiarity with 65nm, 40nm, or 28nm IC design processes is highly desirable.
  • Solid knowledge of STA (Static Timing Analysis) technique...
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