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Senior Staff ASIC Design Engineer

Company

Axiado

Location

Hyderabad, India

Type

full-time

Job Description

  • Help develop the design and implementation/ integration of SoCs.
  • Micro-architecture design, RTL coding, synthesis, timing closure, and documentation of various RTL blocks
  • Support prototyping, test program development, chip validation, and chip life until production maturity.
  • Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.

Qualifications

  • 12+ years of experience in RTL logic design, verification, synthesis, and timing optimization;
  • Proficient in writing clear, implementable micro-architecture specifications;
  • Expertise in writing efficient RTL code in Verilog and SoC integration
  • Good understanding of assertions, coverage analysis, RTL synthesis, and timing closure;
  • Should have worked on interface protocols like PCIe, USB, Ethernet, DDR/LPDDR4/5, I2C/I3C, eSPI, SPI, etc.
  • Experie...

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