Senior RTL Design Engineer, TPU

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
+ 8 years of experience in ASIC design.
+ Experience with SystemVerilog/RTL coding.
+ Experience with scripting languages (e.g., Tcl, Python or Perl).

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience interacting with software, system hardware, and other cross-functional teams.
+ Experience with chip management, clocking, reset, and peripherals like I2C, SPI, UART, etc.
+ Unde...