Analog Layout Engineer
Chipright seeks highly motivated and experienced Analog Layout development engineer to work on high speed interface applications for our customer.
 
 Requirements
 
Analog Layout Engineer – France
 
Requirements
• 7+ years’ minimum experience in Analog Layout
• Experience in Layout of blocks such as PLLs, Transceivers, Receivers
• Experience working on deep sub-micron CMOS (28nm)
• Proficient with Cadence tools
• Ability to influence the architecture-level and design to ensure design layout can be achieved
• Experience with Floor Planning, Power Routing and ESD level design
• Experience with Place & Route, Layout Finishing
• Experience with Design Rule Checking (DRC) and all aspects of Physical Verification